LMG6401PLGE 240*128 dots features blue on grey stn type transflective mode low power el backlight built-in lcd controller hd61830b mechanical data item value unit module dimensions 159.4*101*9.5 mm viewing area 126*71 mm resolution 240*128 dots dot size 0.47*0.47 mm dot pitch 0.5*0.5 mm weight 160 g optical data item symbol condition min typ max unit contrast ratio k ?=10, q =0, note 1 - 3.0 - - brightness - - - 10 - cd/m 2 viewing direction - 6 o?clock viewing angle ?2 - ?1 k=1.4, note 1 - 40 - degree response time (rise) t r ?=10, q =0, note 1 - 250 400 ms response time (fall) t f ?=10, q =0, note 1 - 300 450 ms absolute maximum ratings item symbol condition min max unit supply voltage (logic) v dd - v ss - 0 7 v supply voltage (lc drive) v dd - v ee - 0 22 v input voltage v i - vss vdd v operating temperature t op note 4,5 0 50 c storage temperature t st note 4,5 -20 60 c data interface pin assignment pin no symbol level function a1 vss (0v) - ground a2 vdd (+5v) - power supply for logic a3 v0 - power supply for lcd drive a4 rs - register select a5 r/w - read / write a6 e - enable a7-a14 db0 - db7 - data bus a15 not cs - chip select a16 not res - reset a17 vee (15.0v) - power supply for lcd drive a18-a20 nc - no connection e1-e2 vel - power supply for el driving electrical characteristics item symbol condition min typ max unit supply voltage (logic) v dd - v ss - 4.75 5.0 5.25 v supply voltage (lc drive) v ee - v ss - -14.5 -15.0 -15.5 v supply current i dd note 2 - 6.0 - ma i ee note 2 - 4.0 - ma input voltage (high level) v ih high level 0.8* vdd - vdd v input voltage (low level) v il low level 0 - 0.2* vdd v frame frequency f flm - - 75 - hz duty ratio - 1/128 - recommended lc drive voltage v dd -v o duty=1/128 t=0c, ?=10, note 3 - 16.9 - v duty=1/128 t=25c, ?=10, note 3 - 15.8 - v duty=1/128 t=40c, ?=10, note 3 - 15.4 - v backlight tile voltage v el f el =400hz - 100 - vrms backlight lamp frequency f el - - 400 - hz backlight tile current i el v el =100vr ms, f el =400hz - - 160 marms timing characteristics item symbol min typ max unit enable cycle time tcyc 1000 - - ns enable pulse width (high level) tweh 450 - - ns enable pulse width (low level) twel 450 - - ns enable rise time ter - - 25 ns enable fall time tef - - 25 ns set up time of cs, r/w, rs tas 140 - - ns set up time of input data tdis 225 - - ns data delay time tdd - - 225 ns hold time of data th 10 - - ns hold time of cs, r/w, rs tah 10 - - ns data hold time tdh 20 - - ns connectors connector no special connector required note1: definiti on of optical data, see page xxx note 2: fflm=75hz, vdd-v0=15.8v, d=gnd(vss) note 3: recommended lc driving voltage may fluctuate about +- 0.5v by each module note 4: background colour of the lc d changes depending on temperature. between 40-50c optical characte ristics of the lcd like contrast and viewi ng angle change but the lcd remains readable. note 5: storage at -20 c < 48 hr. ( datasheet : )
mechanical dimensions 9.5max. 4.9 3.5 8.5 5.9 (3.0) 0.50*239+0.47=119.97+/-0.1 126.0+/-0.3 142.4 152.4+/-0.3 159.4 1.5 max +/-0.5 12.0 2.54 48.26+/-0.3 (3.5) (3.5) 2.54 22.86+/-0.3 12.0+/-0.5 1.2+/-0.2 b10 b1 a1 a20 4- ? 3.0 el sealing area block diagram power supply lcd 240*128 x1 x128 y1 y240 80 80 80 ic5 ic3 ic4 64 64 ic1 ic2 flm cl1 cl2 d1 8 vlcd m' 13 osc 8 timing cs res rs r/w e db0 db7 vdd vss vo vee ram power circuit controller hd61830 vdd vo vee +5v vr -15v vr: 10~20k w interface timing diagram power up timing diagram tcyc tweh twel ter tef tas tah th tdis 2.2v 0.8v 2.2v 0.8v tdd tdh 2.4v 0.4v e db0~7 db0~7 (mpu to lcm) ( lcm to mpu) cs,r/w,rs vdd signal vee 4.75v 0 ms min. vdd signal vee 0 ms min. 5v valid data power on power off 0~50 ms 0~50 ms 4.75v
|
